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Dirk Baumann Consulting

Spezialist für Layout-Design von integrierten Schaltkreisen mit Fokus auf Analog- und RF-Technologien

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Unsere Leistungen

Expertise in verschiedenen Bereichen des Layout-Designs für integrierte Schaltkreise

Full Custom Layout Design

Full Custom Layout Design

Spezialisiert auf vollständig kundenspezifische Layout-Designs für komplexe integrierte Schaltkreise. Von der Planung bis zur Implementierung bieten wir maßgeschneiderte Lösungen für Ihre spezifischen Anforderungen.

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Analog Mixed Signal Layout

Analog Mixed Signal Layout

Experte für anspruchsvolle Analog Mixed Signal Designs mit Fokus auf Signalintegrität und optimaler Performance. Wir vereinen analoges und digitales Design für hochwertige Schaltkreislösungen.

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Digital Layout

Digital Layout

Effizientes und optimiertes Digital Layout für moderne integrierte Schaltkreise. Unser Ansatz kombiniert strukturierte Methodik mit innovativen Lösungen für beste Ergebnisse.

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Projektübersicht

Ausgewählte Projekte aus den letzten Jahren, die komplette Liste

Physical Design Engineer – I/O Library Cells

Infineon · Selbstständig – Juli 2023–Heute · 1 Jahr 10 Monate
München, Bayern, Deutschland

  • Developing and implementing physical design architectures, ensuring adherence to electrical and specific requirements such as ESD, temperature, and lifetime considerations
  • IO lib, LVDS + RX + TX + BANDGAP + CASGEN
  • Conducting area estimations at intermediate design stages
  • Verifying the physical design against established sign‑off criteria
  • Collaborating closely with the analog design team, especially in post‑layout simulations
  • Documenting progress through weekly status reports and comprehensive final documentation
  • Estimating and planning work packages for efficient project management and Statement of Work (SoW) creation
  • Creating I/O full‑custom physical designs, thoroughly verified and documented to meet specifications
  • Providing regular updates via weekly status reports

Layout Engineering for various BP products

Infineon · Selbstständig – Dez. 2022–Juli 2023 · 8 Monate
München, Bayern, Deutschland

  • Block‑Level Layout (Charge Pump, ADC, High‑Side Switch Gate Driver, PMU)
  • AMS Layout Activities für mehrere Projekte
  • Layout‑Verifikation (DRC, LVS, ANT, ERC) mit Calibre
  • Interaktion mit Schaltungsdesignern für beste Fläche & Performance
  • Layout Reviews & regelmäßige Fortschritts‑Reports
  • Tools: Cadence Virtuoso XL 6.1.8, Calibre

Analog/Mixed Signal Layouter

Dice · Selbstständig – Apr. 2022–Dez. 2022 · 9 Monate
Linz (Stadt), Oberösterreich, Österreich

  • 28 nm Radar 77 GHz Chip
  • Process: TSMC 28 nm
  • Layout‑Umgebung: Cadence Virtuoso XL 6.1.7
  • Verification: Calibre

Senior Analog Layout Engineer

Cyient · Selbstständig – Okt. 2021–März 2022 · 6 Monate
Duisburg, Deutschland

  • 1. Projekt: Support Layout für Tapeout‑Preparations (TSMC 40 nm)
  • 2. Projekt: Top‑Level Layout – Laser Diode Driver, Bias, Voltage Monitor, ADC & andere (elmos 350 nm)
  • 3. Projekt: High‑Speed MUX bis 8 GHz (TSMC 40 nm)
  • Layout‑Umgebungen: Cadence Virtuoso XL 6.1.8 & Synopsys Custom Compiler
  • Verification: Calibre & ICV

Analog Layouter

Vitesse · Freiberuflich – Jan. 2021–Sept. 2021 · 9 Monate
Ledøje‑Smørum, Dänemark

  • High‑Voltage Switch Capacitor Layout
  • Process: TSMC 22 nm
  • Layout‑Umgebung: Cadence Virtuoso XL 6.1.8
  • Verification: IC Validator

Highspeed Analog Layouter

Mellanox · Freiberuflich – Feb. 2020–Dez. 2020 · 11 Monate
Kopenhagen, Dänemark

  • 26 GHz MUX Layout für Network Switch
  • Process: GlobalFoundries 22 nm FD‑SOI
  • Layout‑Umgebung: Cadence Virtuoso XL 6.1.8
  • Verification: Calibre

Analog/Mixed Signal Layouter

Dice – Juli 2017–Dez. 2019 · 2 Jahre 6 Monate
Linz, Österreich

  • 28 nm Radar 77 GHz Chip (TSMC 28 nm, sbt9, sbt10)
  • Testchip (TSMC 16 nm FinFET)
  • Layout‑Umgebung: Cadence Virtuoso XL 6.1.7
  • Verification: Calibre

Senior Layout Engineer

Texa Insturments – Nov. 2016–Juni 2017 · 8 Monate
Freising, Deutschland

  • Process: TI 130 nm LBC9
  • Layout‑Umgebung: Cadence Virtuoso GXL 6.1
  • Verification: Assura
  • Layout & Verification von ASM‑Makros

Senior Layout Engineer – Teamleader

Oticon – Juni 2016–Okt. 2016 · 5 Monate
Kopenhagen, Dänemark

  • Hearing Aid IC
  • Process: TSMC 65 nm
  • Layout‑Umgebung: Synopsys Custom Compiler Maxwell
  • Verification: Synopsys IC Validator
  • Layout & Verification von I/O Cells für digitalen DSP

Senior Layout Engeneer

Bosch – Sept. 2015–Mai 2016 · 9 Monate
Reutlingen, Deutschland

  • Process: TI 130 nm BCDMOS
  • Layout‑Umgebung: Cadence Virtuoso GXL 6.1
  • Verification: Assura
  • Layout & Verification von ASM‑Blocks & LDO 3 V

Package Verification Engineer

Infineon – Mai 2015–Sept. 2015 · 5 Monate
München, Deutschland

  • Erstellen von Testcases für Package‑DRC Evaluation
  • Konvertieren von Datenformaten (KA, DXF, XAS, GDS)
  • Aktualisieren von Packages mit neuen Chips
  • Layout von Bond‑Diagrammen

Senior Layout Engineer (Project Lead)

ams – Feb. 2015–Mai 2015 · 4 Monate
Unterprämstädten, Deutschland

  • Process: AMS 350 nm
  • Layout‑Umgebung: Cadence 6.1
  • Verification: Calibre
  • RFID Layout – RX, Wakeup, Bandgap, Op‑Amps

Senior Layout Engineer (Project Lead)

Bosch – Aug. 2014–Jan. 2015 · 6 Monate
Reutlingen, Deutschland

  • Process: ST BCD9S
  • Layout‑Umgebung: Cadence 6.1.6
  • Verification: Calibre
  • LDO Layout

Analog Layout Engineer

NXP – Juni 2014–Aug. 2014 · 3 Monate
Gratkorn, Österreich

  • High‑Voltage (–50 V) Analog Layout
  • Process: CMOS SOI 140 nm
  • Layout‑Umgebung: Cadence 6.1.x
  • Verification: Cadence PVS 12.x

RF Physical Layout Designer – Freiberufler

Infineon – Sept. 2012–Juni 2014 · 1 Jahr 10 Monate
München, Deutschland

  • Bluetooth – DPLL Layout
  • Process: TSMC 28 nm & 65 nm
  • Layout‑Umgebung: Cadence 6.1
  • Verification: Calibre (DRC, LVS, ERC, HERC & Antenna Check)

RF CMOS Layouter – Freier Mitarbeiter

NXP – Apr. 2012–Aug. 2012 · 5 Monate
Hamburg, Deutschland

  • Top‑Level Layout: Tuner Module & Block‑Level Analog Mixed‑Signal Layout
  • Process: C65
  • Layout‑Umgebung: Cadence 6.1
  • Verification: Cadence PVS

Layout/CAD Contractor

Globalfoundries – Aug. 2011–Apr. 2012 · 9 Monate
Dresden, Deutschland

  • Flip‑Chip Layout: Placement, Routing, Power Grid etc.
  • TCL‑Programmierung
  • Process: GF C28
  • Layout‑Umgebung: Cadence Encounter
  • Verification: Mentor Calibre (DRC, LVS, ERC)

Eingesetzte Tools

Professionelle Werkzeuge für erstklassiges Layout-Design

Cadence

  • Layout: Virtuoso Layout Suite (L, XL, GXL) in den Versionen 4.x – 6.1.7 - 23.1
  • Verifikation: Assura DRC, LVS, ERC, RCX

Synopsys

  • Layout: Custom Compiler Maxwell 2017
  • Verifikation: icvalidator

Mentor

  • Layout: –
  • Verifikation: Calibre DRC, LVS, ERC, RCX

Kundenstimmen

Was unsere Kunden über unsere Arbeit sagen

I highly recommend Dirk Baumann as an analog and RF integrated circuit layouter. I had the pleasure of working with Dirk and was consistently impressed by his professionalism, skill, and independence. He demonstrated a deep understanding of integrated circuit layout design and was able to effectively execute complex designs while meeting tight project timelines.

Faisal Ahmed
Faisal Ahmed
Senior Staff Engineer, Infineon Technologies

It was a great pleasure to work with Dirk for a couple of months. High expertise, diligent work, good meetings and communication, and quick deliveries. Last not least it was a good personal atmosphere. I would be happy to work with Dirk again in the future!

Dr.-Ing. Marco Wiedenhaus
Dr.-Ing. Marco Wiedenhaus
Project Management/Lead for ASICs, Cyient

Dirk is a very professional man. I worked with him one year and I enjoyed it a lot. He did very professional, high quality layouts. Very often he impressed me with brilliant ideas. He was always very clear in communications and the performance of his work was on a very high level.

Jędrzej Wyczyński
Jędrzej Wyczyński
Senior Mask/Layout Designer Engineer, Mellanox Technologies

Dirk worked for my team at Nvidia with analog layout, with state of the art RF communication for a year and hit the ground running, on a complicated analog circuit. Dirk works well with his immediate colleagues and is proactive in his communication with relevant stakeholders.

Tore Bjørnson
Tore Bjørnson
ASIC Layout Manager, NVIDIA

I am truly happy to recommend Dirk Baumann as layouter for analog/mixed-signal & RF/mm-Wave blocks and transceivers. As responsible for the complete mm-Wave/radar transmitter, I can ensure that Dirk is capable of solving small detailed layout challenges, while keeping the larger picture in mind. Dirk addresses the open topics immediately and interacts proactively with all designers to ensure a constant progress. Despite not being located at the same site, he always communicates very clearly and maintains focus on the key challenges he is addressing. During our collaboration I have always found Dirk accountable and extremely quick. I will certainly miss Dirk when he is no longer part of our project, but I hope to work with him again in the future and I can strongly recommend him for his next assignment.

Jonas Fritzin
Jonas Fritzin
Ph.D., RF/mm-Wave IC Designer and System Engineer, Ericsson

Kontakt

Nehmen Sie Kontakt mit uns auf für weitere Informationen oder ein unverbindliches Angebot

Kontaktinformationen

dbcons GmbH

Gasanstaltstr. 35

01237 Dresden

+49 (0351) 41724620

Unternehmensinformationen

Handelsregister: HRB 41670

Registergericht: Amtsgericht Dresden

Vertreten durch: Dirk Baumann

USt.IdNr: DE344432099